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xen/arm: vgic-v3: Don't implement write-only register read as zero
authorJulien Grall <julien.grall@citrix.com>
Wed, 18 Nov 2015 17:28:05 +0000 (17:28 +0000)
committerIan Campbell <ian.campbell@citrix.com>
Wed, 25 Nov 2015 12:29:29 +0000 (12:29 +0000)
commitc38f9e4d673a485c08c690dc1a2fe8455206fe25
tree258e681ba4a426f374b5e660a56b3339d3aeb20atree | snapshot
parentcdae22a41b95319e035f69c5105f41d4f84744aacommit | diff
xen/arm: vgic-v3: Don't implement write-only register read as zero

A read to a write only register is unknown. Use a memorable value to
differentiate from an actual RAZ register.

Signed-off-by: Julien Grall <julien.grall@citrix.com>
Acked-by: Ian Campbell <ian.campbell@citrix.com>
xen/arch/arm/vgic-v3.c diff | blob | history
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